About
The PolyArch research group, lead by Tony Nowatzki, explores a broad range of ideas in architecture
specialization. Our work is broadly about breaking and reforming traditional
abstractions across applications, programming languages, compilers, the
hardware/software interface, and microarchitectures, with the goal of enabling
high productivity and performance with increasingly parallel and heterogeneous
architectures. We develop novel ISAs, accelerator architectures and their
compilers, accelerator design-automation techniques, and develop open-source
architecture design frameworks.
See see projects page for more details.
See see people for more about us.
Recent News
2023
- We’ll be having a tutorial on DSAGEN/OverGen this year at FCCM – hope to see you there. : )
- Our paper on hybrid in/near memory systems (Infinity Stream) was accepted to ASPLOS 2023!
2022
- Congrats to Vidushi Dadu on your successful graduation. You will be dearly missed! : _ )
- Our FPGA Overlay generation paper was accepted to MICRO! Thanks to everyone on the DSAGEN team and our collaborators: Sihao, Jian, Dylan, Atefeh, Zhengrong, Licheng, Jiuyang, Maxim, Lucheng, and Rishabh
- Our IEEE Micro paper on idiomatic compilers will appear in the special issue of IEEE Micro 2022.
- Congrats to Vidushi on winning our CS department’s Oustanding Graduate Student Award!
- Our collaborative paper with SimpleMachinesInc, “The Mozart Reuse Exposed Dataflow Processor for AI and Beyond”, is accepted at ISCA.
- Congrats to Vidushi and Sihao on their IEEE TopPicks selection for PolyGraph!
- Congrats to Vidushi, her paper on TaskStream was accepted at ASPLOS!
- Congrats to Zhengrong, his paper on Near-Stream Computing was accepted at HPCA!
2021
- Congrats to Zhengrong and Jian for winning Runner-up Best Paper at HPCA 2021!
- Congrats to Vidushi and Sihao, their PolyGraph paper was accepted at ISCA!
- Congrats to Zhengrong et. al for being nominated for best paper at HPCA!
- Congrats to Jian and Sihao for their honorable mention for IEEE TopPicks in computer architecture for 2021!
- Our “Stream Floating” paper was accepted at HPCA 2021. Thank you so much to our collaborators: Jason Lowe-Power from UC Davis, and Jayesh Gaur from Intel.
- Our paper on unifying tensor compilation was accepted at CGO 2021!
2020
- Our paper “DSAGEN: Synthesizing Programmable Spatial Accelerators” was accepted at ISCA 2020!
- Our work, “Towards General Purpose Acceleration by Exploiting Common
Data-Dependence Forms”, has been selected as an IEEE TopPick in computer architecture for 2020! Congrats to my students Vidushi Dadu, Jian Weng, and Sihao Liu!
- Our paper “A Hybrid Systolic-Dataflow Architecture for Inductive Matrix Algorithms” was accepted for publication at HPCA 2020
2019
- Our paper “Towards General Purpose Acceleration by Exploiting Common
Data-Dependence Forms” was accepted at MICRO 2019
- I organized a workshop for the ARM research summit on accelerator abstractions this September. Please see our website for more details.
- Our paper “Stream-based Memory Access Specialization for General Purpose Processors” was accepted at ISCA 2019
- Our article “Heterogeneous Von Neumann/Dataflow Microprocessors” will be appearing in CACM as a Research Highlight in June 2019.
Recruiting
We are actively recruiting new Ph.D. students. I am looking for highly
motivated, hard-working students with experience in architecture design, RTL, compilers,
architecture simulators, and more. See the recruiting
page for more details.
